Debugging

Debug ›› Debug Menu ›› Debug Options ››
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The debugging page offers various debugging settings and source debug information manipulation.


Debug Options, Debugging page


Reset conditional BP counters when CPU stops:

Check to reset all BP pass counters when CPU stops.


Reapply BPs after target download

A target download may add additional information to the symbol table. Some breakpoints configured to source code locations or labels could now be resolved to more addresses.

In this example a BP is set in a file which doesn't participate in the original download file. After download, the BP is temporarily disabled, but re-enabled after target download.


Disable breakpoints before download

When the option ‘Configured on literal addresses’ is selected, the software disables breakpoints configured on literal addresses before download. Breakpoint set in the disassembly window is understood under the term breakpoint set on a literal addresses. Breakpoints set in the source window are set on line symbols and thus they don’t represent any problems when re-linking the project. When a breakpoint is set on an instruction in the disassembly window, it’s set on a first byte of the CPU instruction. After re-linking the project, the same instruction may be reallocated and the breakpoint is no longer set on a first byte. The option prevents setting a breakpoint on an address not aligned with the CPU instruction.

Also, all breakpoints can be disabled using the ‘All’ option. Use this option if the target system is not ready for setting breakpoints after initialization. For example – the chip selects for program code point to default FLASH memory, whereas the debug session runs from RAM. Since FLASH memory device can get ‘confused’ if the debugger tries to write to it (by attempting to set software breakpoints), this option can be used to prevent this from happening. Once the chip selects have been configured, just click ‘Enable all’ in the Breakpoints dialog.

If no breakpoints are to be disabled (in normal debugging operation), this option is to be set to ‘None (default)’.


Disable interrupts during

Checking an option disables interrupts during checked high-level step operations.


Source step until a different line

A single C source line can contain several C statements. The ‘Step’ command will per default step them individually, but there will be no visual change in the source debug window. If this option is checked, the Step command will be repeated until a different source line is reached.


Reserve one breakpoint for high level debugging

By default, one breakpoint is reserved for high-level debugging. If software breakpoint functionality is not needed, the breakpoint can be released for the user program to use. If this is the case, uncheck the 'Reserve one breakpoint for high level debugging' option.


Display markers only in the last line

Some compilers produce line information for a multi-line statement for all its source lines. winIDEA will display line symbol markers in all those lines. If you find this disturbing, enable this option to display the line symbol marker only in the last statement line.


Set only one breakpoint on a source line with multiple locations

A single source line can (especially when code is optimized) be non-contiguous (i.e. be on several locations in memory). Also, code which is inlined yields multiple addresses for a single source location. On a CPU with limited number of hardware breakpoints, setting such a breakpoint would exhaust all the available breakpoints. If this option is checked, only the first address is used as a breakpoint.


Trust source line debug info

Compiler debug information on source lines is used for debugging and tracing. Several quality improvements are possible by relying on it, but if the information wrong it will break the operation of some functions.

In such case, and on advise of technical support, disable this option.


Source Line Ambiguity resolution

When resolving source position ambiguity within the same module, winIDEA can automatically select either the lowest address of compliant lines, or the highest.