NDisassemble Namespace Reference

Description

This namespace containf disassembler flags.

Enumerations
enum	EINST_Flags {   flWrite = 0x0001 , flRead = 0x0002 ,   flIndirect = 0x0004 , flRelative = 0x0008 ,   flCall = 0x0010 , flConditional = 0x0020 ,   flConditionFalse = 0x0040 , flAltISA = 0x0080 ,   flOCT_Mask = 0x0F00 , flOCT_DBM = 0x0100 ,   flOCT_IBM = 0x0200 , flOCT_HIST = 0x0400 ,   flOCT_HIST2 = 0x0800 , flPTM_Waypoint = 0x0100 ,   flPTM_ReturnStack = 0x0200 , flETM4_Atom = 0x0400 ,   flETM4_AtomW = 0x0800 , flETM4_AtomR = 0x1000 ,   flETM4_Wait = 0x2000 , fl_TPU_Flush = 0x1000 ,   fl_TPU_Flush_Valid = 0x2000 , fl_PPC_mflr = 0x1000 ,   fl_PPC_stwu_r1 = 0x2000 , fl_TC_MCDS_Direct = 0x0100 ,   fl_TC_MCDS_Indirect = 0x0200 , fl_TC_FastRet = 0x0400 }
	These flags describe instruction. More...
enum	EINST_TYPE {   it_Unknown = 0x0000 , it_Continue = 0x0001 ,   it_Jmp = 0x0002 , it_CondJmp = 0x0003 ,   it_Ret = 0x0004 , it_Reti = 0x0005 ,   it_Trap = 0x0006 }
	This enum contains general instruction types. More...
enum	EINST_TYPE_CPU {   it_Unused = 0 , it_First = 1 ,   it_ARM7_CPRT = it_First , it_ARM7_ThumbBL ,   it_ARM7_ThumbBLX , it_ARM7_EnterThumb ,   it_ARM7_EnterARM , it_PPC_SRModify = it_First ,   it_PPC_LRModify , it_PPC_CTRModify ,   it_PPC_Branch_First , it_PPC_BLR = it_PPC_Branch_First ,   it_PPC_BCTR , it_PPC_BLR_LRModify ,   it_PPC_BCTR_LRModify , it_PPC_B_LRModify ,   it_PPC_B , it_PPC_Branch_Last = it_PPC_B ,   it_TC_Loop = it_First , it_TC_calli ,   it_TC_ji , it_78K0R_skip = it_First }
	This enum contains CPU specific instruction types. More...

Enumeration Type Documentation

EINST_Flags

enum NDisassemble::EINST_Flags

These flags describe instruction.

Enumerator
flWrite	low WORD of m_dwExtra contains the size mem access in MAUs
flRead	low WORD of m_dwExtra contains the size mem access in MAUs
flIndirect	instruction is indirect jump(PC can not be determined from op-code only).
flRelative	the direct branch is using relative displacement
flCall	in conjunction with NDisassemble::it_Jmp, this indicates that it's a subroutine call
flConditional	conditional instruction, sequential, jump,...
flConditionFalse	instruction condition is false - valid when daWantConditionPass requested
flAltISA	alternate instruction set
flOCT_DBM	instruction generates a Nexus DBM
flOCT_IBM	instruction generates a Nexus IBM
flOCT_HIST	instruction generates entry into nexus HIST field
flOCT_HIST2	instruction generates two entries into nexus HIST field (flOCT_HIST must also be set)
flPTM_Waypoint	this instruction is waypoint instruction (see "CoreSight Program Flow Trace Architecture Specification")
flPTM_ReturnStack	this instruction is bl instruction which should push return address to return stack
flETM4_Atom	this instruction generates ETM4 Atom packet
flETM4_AtomW	this instruction generates ETM4 Atom packet when data trace is on for writes
flETM4_AtomR	this instruction generates ETM4 Atom packet when data trace is on for reads
flETM4_Wait	entry into low power mode WFI or WFE
fl_TPU_Flush	pipe is flushed (DBM is not used for tpu -> reuse flag)
fl_TPU_Flush_Valid	this instruction has flush field valid
fl_PPC_mflr	mflr instruction - used for detection of leaf functions in call stack
fl_PPC_stwu_r1	stwu r1,... - used for detection of frame modify for call stack
fl_TC_MCDS_Direct	direct branch
fl_TC_MCDS_Indirect	indirect branch
fl_TC_FastRet	fast ret

EINST_TYPE

enum NDisassemble::EINST_TYPE

This enum contains general instruction types.

Enumerator
it_Unknown	Unknown instruction type.
it_Continue	Continue instruction.
it_Jmp	Jump instruction.
it_CondJmp	Conditional jump instruction.
it_Ret	Return instruction.
it_Reti	Return from interrupt instruction.
it_Trap	Trap instruction.

EINST_TYPE_CPU

enum NDisassemble::EINST_TYPE_CPU

This enum contains CPU specific instruction types.

Enumerator
it_Unused	default
it_First	first special
it_ARM7_CPRT	MCR or MRC instruction.
it_ARM7_ThumbBL	thumb bl instruction
it_ARM7_ThumbBLX	thumb bl instruction, enter to ARM mode
it_ARM7_EnterThumb	this instruction causes transition from ARM to Thumb mode
it_ARM7_EnterARM	this instruction causes transition from Thumb to ARM mode
it_PPC_SRModify	mtmsr, mtsrr1, mtcsrr, mtmcsrr1 instructins
it_PPC_LRModify	instruction will modify LR
it_PPC_CTRModify	instruction will modify CTR
it_PPC_Branch_First	first branch item
it_PPC_BLR	branch to LR
it_PPC_BCTR	branch to CR
it_PPC_BLR_LRModify	branch to LR and modify LR
it_PPC_BCTR_LRModify	branch to CR and modify LR
it_PPC_B_LRModify	branch and modify LR
it_PPC_B	branch
it_PPC_Branch_Last	last branch item
it_TC_Loop	Tricore loop.
it_TC_calli	Tricore calli.
it_TC_ji	Tricore ji.