ARM Cortex
The information provided in this chapter is intended to be used together with the CPU reference manual provided by the silicon vendor. This chapter assumes knowledge of the CPU functionality and the terminology and concepts defined and explained in the CPU reference manual. Basic knowledge of winIDEA is also necessary. This chapter deals with specifics and advanced details and it is not meant as a basic or introductory text.
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Not all debug protocol, trace protocol and debug connector combinations are possible. Debug Protocol is available unrelated to the used connector. Following table lists available trace protocols regarding to chosen Debug Protocol and Debug Adapter.
Debug Adapter |
ARM CoreSight 20-pin |
ARM CoreSight 10-pin |
ARM-JTAG 20-pin |
Debug Protocol |
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JTAG cJTAG |
ETB MTB PARALLEL ETF ETR |
ETB MTB ETF ETR |
ETB MTB ETF ETR |
SWD |
SWO ETB MTB PARALLEL ETF ETR |
SWO ETB MTB ETF ETR |
SWO ETB MTB ETF ETR |
More resources |